1. Field of the Invention
The present invention relates, in general, to a lead frame and a method for fabricating a semiconductor package employing the same.
2. Description of the Related Art
Technologies for fabricating a semiconductor package for electrically or electronically connecting a semiconductor chip to an external environment are largely classified into two technologies: fabricating a Quad Flat Package (QFP), and fabricating a Ball Grid Array (BGA).
A lead frame is conventionally employed in manufacturing the QFP. The lead frame supports the chip as a separate element, and provides a structure for transmitting the function of the semiconductor chip to an external circuit.
The lead frame includes a die pad on which a semiconductor chip is mounted, inner leads which are bonded to a bonding pad on the semiconductor chip through a wire, outer leads through which the inner leads are connected to the external circuit, and a frame which supports the die pad and the inner and outer leads.
The process for fabricating the lead frame includes forming the lead frame using a stamping process, or by forming the lead frame using an etching process. The stamping process stamps a material with a press using an alloy. The etching process uses a chemical corrosion to etch the material. In fabricating the lead frame using the stamping process, the material is located on a die and it is fixed thereon using a stripper. By stamping the material with the press, a lead frame with a given pattern is formed.
On the other hand, in forming the lead frame using the etching process, after spreading out a photoresist on the surface of the material, a given pattern is formed on the surface by exposing the material being masked to the light, and etching the material with a corrosion liquid. As a result, a lead frame with a given pattern is formed. At this time, the corrosion liquid is spread out at a given pressure from both sides of the material of the lead frame.
The lead frame of the QFP-based semiconductor package manufactured by one of the aforesaid processes includes inner leads having a substantial length and a substantially narrow width, as compared to lead frames of other types of semiconductor packages. Accordingly, when an external force is applied in the vertical direction to the length of the inner lead, the inner lead becomes easily ‘transformed’, i.e., the inner lead may become warped or twisted, for example.
The transformation is generated because the inner lead has a structure which is weak to the displacement of the lead in the vertical direction. Especially, as the trend of using high pins and small chips (due to the miniaturization and high integration of electronic equipment) becomes more commonplace, the pitch of the inner lead may be diminished, leading to a more severe transformation.
As described above, as the pitch of the inner leads becomes diminished, the width of the lead, and the intervals between the leads, are narrowed, and the thickness of the inner leads is reduced. Accordingly, the inner leads may become more easily curved or twisted, even with a small shock, causing a degradation in the planarity of the inner leads.
This inferiority could occur at anytime during the process of manufacture and carriage of the lead frames, and/or during the process of applying the lead frame to a molding process. Accordingly, it is desirable to be able to substantially prevent the transformation of the lead frame from occurring during the manufacturing process.
Once the inner leads are transformed, the degraded inner leads influence stitch bonding process during a follow-on packaging operation, such that is may be impossible to perform a normal wire bonding. As a result, the transformation of the inner leads may be a direct cause of a reduction in package integrity, which may result in substantial, large scale decreases in productivity.
The aforesaid problem may be further explained with respect to connecting a semiconductor device to the lead frame using a bonding equipment. The equipment consists of a heater located on a heater block, and a capillary on which the wire bonding operation is performed. When a lead frame on which a semiconductor chip is mounted is located on an upper surface of the heater block, inner leads which are curved or twisted do not adhere closely to the upper surface of the heater block, and may come apart from or off of the upper surface. In the case of bonding the wire using the capillary, the capillary applies a given pressure to the inner leads. Since the inner leads have come apart from the upper surface of the heater block, the wire does not closely adhere to the inner lead, since the power supporting the inner leads is not applied to the bottom of these inner leads. Accordingly, the wire that is attached to inner leads with inferior planarity may become easily separated from the inner leads, thereby causing inferior bonding between leads and wire.
On the other hand, when the wire is bonded to the inner leads, a given length of the wire is exposed to the outside environment of the capillary, and an electrical shock is applied to the exposed wire. Thereafter, a bonding ball (such as a solder ball) is formed at a terminal of the capillary. The bonding ball is attached to the semiconductor chip.
However, when the wire is bonded to curved or twisted inner leads, the bonding ball cannot be adequately formed at the terminal of the capillary, or a bonding ball is formed that is smaller than a desired or expected size. This happens because the curved or twisted inner leads move up with the capillary due to the elasticity, such that the leads push the wire (which is exposed to the terminal of the capillary) to the inside of the capillary. If a bonding ball with a desired size cannot be formed at the terminal of the capillary as described above, the bonding equipment must be shut down. As a result, in the case of having a large number of curved or twisted inner leads, the bonding equipment is frequently downed, thereby causing reductions in productivity.